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Boundary Scan JTAG
jtag scripting language
jtag scripting language

Learn More
Standard Features:


Base
BSDL Library
Schematic Debug
» Visual Fault Analysis
» Timing Diagram
» TCL Scripting Language

Tests & Programming
Scan Path Test
Interconnect Pin Fault
Memory Test
» FLASH Programming
» FPGA/CPLD ISP
» ScanWorks®


Analog Instrument
VISA Instrument Control
GPIB IEEE 488 Control


Options:
1149.1/1149.6 Interconnect
Interconnect Diagnostics
CircuitMerge
Vector Translator
C++ and Libraries
LabView Interface
Network Licensing

WGL Vector Support
VCS Sim Interface

Hardware Options:


UltraTAP JTAG Controller
PT100Pro Production Tester
PT100 Multiport JTAG
RCT Benchtop Tester
32 bit PCI Card Tester
PC Printer Port
Xilinx PCIII/PCIV
Altera Byteblaster


» Eclipse Brochure

» Eclipse Family Overview
» Test Development
» Manufacturing Test
» Diagnostics and Repair


JTAG Scripting Langauge

TCL/TK Scripting with extensions for PCB or System level JTAG

TCL/TK Scripting with extensions for IEEE-488/GPIB Instruments

TCL/TK Scripting with exentsions for VISA Instruments

TCL/TK Scripting with extensions for IEEE P1687 Instruments

Overview

The Eclipse Test Development Environment and Eclipse ScanExecutive environment support an open, extensible JTAG boundary-scan scripting language to execute commands and develop flows without resorting to C++ programming. Intellitech led the field with the introduction of TCL/TK with JTAG extensions in 1997.

The TCL/TK language with JTAG extensions helps customers in several ways:

custom scripts for flow control of 1149.1 test types or cluster testing of non-JTAG parts such as UARTS, Northbridges, Infrared devices, I2C devices, SPI based devices, PCI based devices.

All of the scripts developed can be re-used in other targets without changing the code. Memories, EEPROM and FLASH can be tested with the scripting language, however, Intellitech's FLASH programming interface and Memory Test capability have

libraries of traditional SRAM, DRAM, EEPROM, Serial/I2C EEPROMS and FLASH devices. Included with the scripting language is a comprehensive single-step debugger with breakpoints for developing scripts as well as easy access to the Timing Analyzer for monitoring bus emulation of custom scripts.  The TCL/TK language has been extended for interactive GUI control, mouse events, and sophisticated event call backs.  Not only can you re-use test scripts but entire custom GUI for tests can be re-used from one PCB to the next.

Eclipse TCL/TK enables users to customize their entire test flow including:

  • Control and read third party instrumentation
  • File I/O - read and write
  • Develop customized GUIs
  • Access/control pins, nets, busses, and scan registers within a design to improve diagnosis and debug
  • Develop customized tests for memories and non-scan logic clusters
  • Automate an entire manufacturing test down to the level of prompting specific actions from a test operator

ESL has an interactive single-step development environment, with trace and breakpoints for efficient design and test debug. Third party development tools are also available that support the language.

JTAG Scripting Simple to write Scripts

ESL is interpreted bytecode. This simplifies program and flow development. ESL supports useful constructs that can be linked together into a 'program' to perform any number of operations using the Eclipse Test Development Environment, Scan Executive Manufacturing Test Station or supported test hardware.

ESL provides a rich set of functions for design and test applications and can be easily extended with application specific commands using C++. Programs can be rapidly developed and will run on either Windows or Linux hardware platforms.

Specialized extensions to scripting language

ESL has extensions and constructs to support the creation and application of 1149.1 test programs, in-system FPGA and CPLD configuration and in-system FLASH programming.

Test Development Functions

  • Eclipse Message control
  • Diagnostic handling
  • Bus and register manipulation and observation
  • Pin manipulation and observation
  • non-JTAG pin and bus control and observation
  • TAP state control

Test Controller Functions

  • Hardware setup
  • Control pin voltages
  • Clock pulse widths and frequencies

SVF and WGL control

  • Apply and observe data
  • Process and flow control

    • Event handling
    • Event Protocol

    Third party interfaces

    • Database handling
    • Connecting to 3rd party software or devices
    • Remote Command Interfaces

    Re-usable Analog and Boundary-Scan Tests

    • VISA - Virtual Instrument System Architecture
    • GPIB controlled measurements

    VFATM (Visual Fault Analyzer)

    • Visualization controls