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IEEE 1149.1 ICs and JTAG Test Components

TEST-IPTM for 1149.1 test, Flash Programming & FPGA configuration

Lower system costs begin with easy to use JTAG scan components. The TEST-IP Family is patented infrastructure Intellectual Property which enables design teams to produce high-quality self-testable and in-the-field re-configurable products based on 1149.1/JTAG techniques. Plug and play scan components save you design time, reduce BOM costs and add new valueable capabilities your customers are willing to pay for.

PCB Self-Test BIST

IEEE 1149.1 Test & Flash Programming Tools

Boundary Scan test tools   - Read how the Eclipse boundary scan family fits into your PCB scan test and FLASH programming strategy . All of Intellitech's PCB test tools support ARM CPU emulation test and analog test through GPIB/VISA/PXI instruments as a basic PCB test capability.

boundary scan test   The Eclipse Test Development Environment is a complete solution for 1149.1 based testing, debug and in-system configuration of complex PCBs and Systems.  Read how Intellitech's exclusive schematic based debug can lower your prototype debug and test development time. Toggle and observe logic values on the pins of your devices simply by pointing and clicking on logic views of your design.

Do you have a small PCB and think you can't afford an investment in quality tools? Do you have less than six JTAG/1149.1 devices? You know Intellitech for high-end 1149.x test, but small PCB versions of Eclipse are more affordable than you think! Register to download evaluation copies and get online price lists.


Find PCB shorts and opens faster with Scan Executive, the production test version of Eclipse. Export Boundary Scan, PDL, SPI, I2C, Memory, SERDES and analog tests from Eclipse execute on the Scan Executive platform with iTestNet cloud-based test management. Scan Executive supports singe unit testing or multiple unit testing depending on the USB controller or full tester you are using.


Intellitech has two award winning testers, the PT100 Concurrent JTAG Tester  and JAF Pro Concurrent JTAG Tester that can test multiple PCBs and program FLASH on-board within production cycle times. Test and Program 16, 32, 64 or more PCBs in order to increase throughput. Concurrent test enables you to add more comprehensive tests (which take longer to execute) without creating production bottlenecks.

Concurrent Boundary Scan (CJTAG) for Burn-in or Production

Need to add JTAG tests to your PCB burn-in? The PT100 Concurrent JTAG Tester is an expandable tester designed to allow testing and programming of large numbers of UUTs currently with full diagnostics.

fast Production JTAG Programming and test


JTAG test functional test

JAF (JTAG Assisted Functional) Test

For production test, consider our pre-designed PXI based JAF(R) Pro which combines all analog testing, JTAG/1149.1 and emulation based functional tests with industry standard Everett Charles VG interface. The JAF(R) Pro is the perfect solution for testing boards with a CPU, some 1194.1/JTAG and analog test points.



June 1, 2020 Intellitech has purchased an office condo in Rochester! This expands our air-conditioned lab space to better serve our customers. With interest rates so low, owning is a better option than leasing. Our new address is 60 Rochester Hill Rd. Rochester, NH 03867. Tel: 603-403-8030

September 17th, 2018. Intellitech CEO, CJ Clark to keynote November 20th, 2018 JIEP Open Conference at the Japan Institute of Electronics Packaging, Suginami-ku, Tokyo Nishiogikita 3-12-2 circuit Hall.

May, 2017. 1149.10 High Speed JTAG approved and standard now available to the public.

January 15, 2017. P1149.10 High Speed JTAG ballot closes with 95% approval. P1149.10 provides for a new approach to on-chip test and silicon instrumentation using SPI, USB, PCIe and other SERDES interfaces. IEEE P1149.10 is chaired by Intellitech CEO, CJ Clark.

November 21, 2016. Embedded Instrument IJTAG White paper. This white paper describes how to describe and use the Xilinx SYSMON ADC using IEEE 1149.1-2013 and ATEAsy. Embedded Instrument

May 24th, 2016. High Speed JTAG - the proposed IEEE P1149.10 standard passes first ballot with an 85% approval rating. P1149.10 provides for a new approach to on-chip test and silicon instrumentation using SPI, USB, PCIe and other protocols. IEEE P1149.10 is chaired by Intellitech CEO, CJ Clark.

December 18th, 2015. Intellitech Granted US Patent US9,152,749 for Pay-per-Use IP core licensing for IP cores used in SoC designs and FPGAs. IP Core licensing patent

October 1st, 2015. Intellitech iJTAGServer Leverages Cadence Incisive Enterprise Simulator for IEEE 1149.1-2013 Silicon Instrument Verification. Cadence iJTAG Server for IP verification.

Prior News...


“I like the fact that Intellitech has good overall long term vision for IEEE 1149.x based test. They are not just reacting to what I need at the moment....Support has been one of the best I’ve ever encountered from a vendor...We truly feel that Intellitech helps us deliver a better product to our customers..."
Full interview

Jake Haddock
Alta Data Technologies

We had boards that had ‘passed’ ICT and boundary-scan tests at the CM, but were non-functional.  Intellitech’s innovative multi-processor fault coverage covered interconnects missed by the CM’s tests.
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Joe Gagnier, Manager, Unisys

“We’re using Intellitech’s PT100Pro with FlashJETT in our production to program two different microcontrollers on four  PCBs at a time. It is no longer business as usual in the auto industry.  We must use new solutions which provide the most value for our budget.   Intellitech’s FlashJETT solution enables us to achieve production line throughput while simultaneously meeting our cost objectives”

Nagabhushana Shastry SMT Manager Continental Automotive Components

More JTAG Success...

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New Strategies for cost effective production PCB test and configuration