Multi-Drop 1149.1 (JTAG) Addressable IC with Parallel Test and
Configuration
The PTC (Parallel Test and Configuration) is a member of the Intellitech TEST-IP family of
infrastructure IP products. The TEST-IP product family
facilitates test, debug and in-system programming of ICs, PCBs
and multi-PCB systems. The PTC provides
multiple scan rings at the PCB level and scan access to each
PCB at the system level.
The PTC provides
an addressable gateway to PCBs in a multi-PCB system.
The PTC has flexible secondary scan-chains, buffering and
voltage level shifting for 4 to 12 local scan-chains.
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"Intellitech’s Parallel Test Bus provides us with a system level
test architecture that is important for the reliability and quality we need in
our products.” |
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Pete Marconi
VP of Systems Engineering
Axiowave Networks
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Unlike earlier commercial
ICs such as Scan Bridge, STA112, STA111 and ASP, the PTC enables
simultaneous test of all of the similar PCBs in the system
using Intellitech's Patented CJTAG(TM) Concurrent JTAG Bus. The PTC also has
patented address 'aliasing' not found in other multi-drop bus components which critical for
reducing PCB-to-PCB level interconnect tests in dynamic systems. The PTC
addressing approach overcomes the fixed addressing of Scan
Bridge and ASP. While Scan Bridge and ASP have 'slot addressing', the PTC
has patented 'PCB Type' addressing, enabling on-the-fly identification and
location of PCB types in a dynamic system.
Key Benefits
- Enables JTAG / 1149.1 access to any PCB in a system from a single 1149.1
interface
- Enables simplified in-the-field updates and upgrades by providing a
structured access mechanism to all volatile and non-volatile ICs in a system
(enables programming FPGAs, FLASH, EEPROMS, DAC/ADCs, Gigabit I/O
Pre-emphasis) across a backplane from a central point
- Enables faster on-board programming and test times by providing a
patent-pending 'parallel test bus' over standard IEEE 1149.1 boundary scan.
- Enables simultaneous test and on-board programming on each similar PCB in
a system without the added cost of having on-board PROMs or BIST in each
system PCB.
- Enables simplified PCB-to-PCB interconnect testing
- Provides high-fanout and voltage translation for 4-12 scan-rings on each
system PCB
- Fully compatible with the SystemBIST
embedded test and configuration strategy
Further information is only available by contacting Intellitech
directly.
CJTAG is a trademark of Intellitech Corp. |
