Durham, NH – January 29th, 2009 – Intellitech Corporation, www.intellitech.com, the leader in lowering electronic product costs through IEEE 1149.1/JTAG, has announced that its CEO, CJ Clark, will present at DesignCon 2009. Mr. Clark’s paper is on "Business Considerations for Systems with RAM-Based FPGA Configuration".
The abstract of the paper is as follows. "Can an FPGA configuration choice hurt the company’s bottom line? RAM-based FPGAs need on-board methods to program a design into the FPGA at power-up. Years ago, the primary solution was to add a specialized FPGA PROM to the PCB for this purpose. FPGAs now have eight or more ways to load design bits using external NOR FLASH, serial FLASH, a CPU, JTAG, or other specialty devices. Is it good use of engineering time to build an ad-hoc method? Complexity has increased as the solution must support multiple design versions, encryption, gray market protection, Trojan protection, fail-safe updates, mixed FPGA families, and more. This paper explores the methods and costs to the company." For more information on DesignCon 2009 go to www.designcon.com.
If you missed DesignCon 2009, you can read the paper here: FPGA Security