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Boundary Scan JTAG


» Scan Exec Brochure

» Eclipse Family Overview » Test Development
» Manufacturing Test
» Diagnostics and Repair

Standard Features:


» Test Execution
» Test Flow Control
» Diagnostics
» Debug
» Data Logging
»
Schematic Debugger
»
Physical Debugger

Optional Capabilities:


» Advanced Diagnostics
» C++ and Libraries
» Network Licensing

Hardware Options:


» UltraTAP
» RCT-II
» PCI ScanLab
» Parallel Port


Scan Executive Debug Capabilities

The Scan Executive Manufacturing Test Station provides a robust set of interactive capabilities to enable manufacturing personnel to isolate and correct problems inadvertently introduced during the PCB assembly process. The Scan Executive Manufacturing Test Station is unique in the industry as it provides the same debug and diagnostic capabilities found in the Eclipse Test Development Environment as standard features. Many 1149.1 tool vendors do not provide debug and diagnostic capabilities in their standard product offerings and force users to purchase a separate package to diagnose failures. Not having debug and diagnostic capabilities in the manufacturing environment is costly and should be a consideration when purchasing an 1149.1 test solution.

Visual Fault Isolation

The Scan Executive Manufacturing Test Station provides the Visual Fault AnalyzerTM (VFATM) to isolate the locations of manufacturing defects to a graphical image of a PCB to accelerate the fault resolution process. VFA and Schematic Logic ProbeTM (SLPTM) aide design debug by enabling cross probing between the PCB and the logical design.


Visual Fault Analyzer Window

Schematic Logic Probe or SLP is the aggregation of two traditional design debug tools into a single software package that enables test engineers to quickly resolve problems on PCBs with limited access.

SLP combines the best attributes of a logic probe - its ability to observe the logic state of a pin in a design -- with those of paper schematics -- shows a complete logical view of a PCB - to provide design and test engineers with virtual debug environment.


Schematic Logic Probe Window