Use CJTAG for System JTAG and Multi-Drop 1149.1 (JTAG)
The CJTAG IC is a member of the Intellitech TEST-IP family of
infrastructure IP products. The TEST-IP product family
facilitates test, debug and in-system programming of ICs, PCBs
and multi-PCB systems. CJTAG provides
multiple scan rings at the PCB level and scan access to each
PCB at the system level. Each CJTAG IC is an addressable gateway to the PCBs in a multi-drop system.
The CJTAG IC has flexible secondary scan-chains, buffering and
voltage level shifting for 4 to 12 local scan-chains.
"Intellitech’s Parallel Test Bus provides us with a system level
test architecture that is important for the reliability and quality we need in
VP of Systems Engineering
Unlike earlier commercial
ICs such as Scan Bridge, STA112, STA111 and ASP, CJTAG enables
simultaneous test of all of the similar PCBs in the system
using Intellitech's CJTAG Concurrent JTAG Bus. CJTAG also has
patented address 'aliasing' not found in other multi-drop bus components which critical for
reducing PCB-to-PCB level interconnect tests in dynamic systems. The CJTAG
addressing approach overcomes the fixed addressing of Scan
Bridge and ASP enabling re-use of board-to-board interconnect and SERDES BER tests..
Further information is only available by contacting Intellitech
CJTAG is a trademark of Intellitech Corp.
- Enables JTAG / 1149.1 access to any PCB in a system from a single 1149.1
- Enables simplified in-the-field updates and upgrades by providing a
structured access mechanism to all volatile and non-volatile ICs in a system
(enables programming FPGAs, FLASH, EEPROMS, DAC/ADCs, Gigabit I/O
Pre-emphasis) across a backplane from a central point
- Enables faster on-board programming and test times by providing a
patent-pending 'parallel test bus' over standard IEEE 1149.1 boundary scan.
- Enables simultaneous test and on-board programming on each similar PCB in
a system without the added cost of having on-board PROMs or BIST in each
- Enables simplified PCB-to-PCB interconnect testing
- Provides high-fanout and voltage translation for 4-12 scan-rings on each
- Fully compatible with the SystemBIST
embedded test and configuration strategy