JTAG EMULATION TEST
JET TEST FUNCTIONAL TEST CONCURRENT TEST
USING MICROPIN VERTICAL
FIXTURES
Copyright © Intellitech Corp. 2009. All rights reserved.
Consider 1149.1/JTAG TCK
counts:
- on-chip programming - 50-100M TCKs
- non-accessible FLASH - 100M-900M TCKs
- FPGA/CPLD 1M-85M
TCKs
- CPU emulation (branching/polling/decision
making)
ICT Tester Memory Depth = N (2*N needed w/o RZ/NRZ pulse)
$ ß
8K, 16K
bits = N = 64K,128K à $$$$$
Answer: Not Really – one DMM,
one DCV/DCI - ICT is not scalable