|System Test can
learn from IC test, where structured DFT was developed to reduce test
development time through ATPG.
|Like cores in the
IC, Systems need to have a test architecture that is scalable and enables
test re-use of manufacturing PCB tests.
|Fault coverage at
the system level can be measured where structured stuck-at tests and
structured at-speed tests are used.
|Reduce the test
development time by layering 1149.1 structured tests with 1149.1 based
at-speed tests. Automatic test
generation, and automatic and robust diagnostics