ICT in-circuit pcb test boundary scan

 

 

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Definitions and acronyms for Press Releases

BIST - Built In Self-Test.  Logic designed to perform a test and return a result with minimal stimuli from outside the IC.  Examples are Memory BIST, SERDES BIST and DDR BIST.


BSDL -  Boundary Scan Description Language.   A formal description language for the boundary scan register and all internal IC based scan registers.  It has been part of IEEE 1149.1 since 1994 but was extensively revised in 2013 to add hierarchical descriptions, register segmentation and IEEE 1500 compliance for internal registers.


DDR - Double Data Rate -  Synchronous Dynamic Random Access Memory which has an interface where data is delivered on both rising and falling edges a common clock.


IEEE - Institute of Electrical and Electronic Engineers


JTAG - Joint Test Action Group.  The original group of engineers in the 1980s who developed the basics of the proposal which later became IEEE P1149.1, ratified first in 1990.

PDL - Procedural Defintion Langauge. A langauge defined in 1149.1 and ratified by the IEEE for communicating with on-chip test data registers.

SERDES - Serializer/Deserializer.   SERDES is an acronym typically used to describe generically high-speed serial input/output on a chip.   PCIe and USB 3.0 are examples of SERDES.


SoC - System on a Chip.


Tcl - Tool Command Language